onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /vector_sim_top/clk
add wave -noupdate /vector_sim_top/rst_n
add wave -noupdate /vector_sim_top/vector_top/vector_idle_o
add wave -noupdate /vector_sim_top/vector_top/vrrm_idle
add wave -noupdate /vector_sim_top/vector_top/vmu_idle
add wave -noupdate /vector_sim_top/vector_top/vis_idle
add wave -noupdate /vector_sim_top/vector_top/vex_idle
add wave -noupdate -divider {Performance Stats}
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/total_cycles
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/total_issues
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/total_idle
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vis/idle_no_valid
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/stall_locked
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/stall_pending
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vmu/vmu_ld_eng/total_ld_stalled_due_is
add wave -noupdate -divider <NULL>
add wave -noupdate -radix unsigned -childformat {{{/vector_sim_top/vector_driver/data1_list[441]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[440]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[439]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[438]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[437]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[436]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[435]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[434]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[433]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[432]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[431]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[430]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[429]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[428]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[427]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[426]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[425]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[424]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[423]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[422]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[421]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[420]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[419]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[418]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[417]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[416]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[415]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[414]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[413]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[412]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[411]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[410]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[409]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[408]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[407]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[406]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[405]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[404]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[403]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[402]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[401]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[400]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[399]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[398]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[397]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[396]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[395]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[394]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[393]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[392]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[391]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[390]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[389]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[388]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[387]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[386]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[385]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[384]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[383]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[382]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[381]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[380]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[379]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[378]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[377]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[376]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[375]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[374]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[373]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[372]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[371]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[370]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[369]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[368]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[367]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[366]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[365]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[364]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[363]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[362]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[361]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[360]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[359]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[358]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[357]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[356]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[355]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[354]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[353]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[352]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[351]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[350]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[349]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[348]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[347]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[346]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[345]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[344]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[343]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[342]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[341]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[340]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[339]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[338]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[337]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[336]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[335]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[334]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[333]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[332]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[331]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[330]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[329]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[328]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[327]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[326]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[325]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[324]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[323]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[322]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[321]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[320]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[319]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[318]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[317]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[316]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[315]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[314]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[313]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[312]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[311]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[310]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[309]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[308]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[307]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[306]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[305]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[304]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[303]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[302]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[301]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[300]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[299]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[298]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[297]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[296]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[295]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[294]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[293]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[292]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[291]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[290]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[289]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[288]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[287]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[286]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[285]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[284]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[283]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[282]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[281]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[280]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[279]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[278]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[277]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[276]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[275]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[274]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[273]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[272]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[271]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[270]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[269]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[268]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[267]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[266]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[265]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[264]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[263]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[262]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[261]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[260]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[259]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[258]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[257]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[256]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[255]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[254]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[253]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[252]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[251]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[250]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[249]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[248]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[247]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[246]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[245]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[244]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[243]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[242]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[241]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[240]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[239]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[238]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[237]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[236]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[235]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[234]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[233]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[232]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[231]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[230]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[229]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[228]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[227]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[226]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[225]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[224]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[223]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[222]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[221]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[220]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[219]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[218]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[217]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[216]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[215]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[214]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[213]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[212]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[211]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[210]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[209]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[208]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[207]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[206]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[205]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[204]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[203]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[202]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[201]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[200]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[199]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[198]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[197]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[196]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[195]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[194]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[193]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[192]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[191]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[190]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[189]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[188]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[187]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[186]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[185]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[184]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[183]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[182]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[181]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[180]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[179]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[178]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[177]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[176]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[175]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[174]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[173]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[172]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[171]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[170]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[169]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[168]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[167]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[166]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[165]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[164]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[163]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[162]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[161]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[160]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[159]} -radix unsigned} {{/vector_sim_top/vector_driver/data1_list[158]} -radix unsigned} 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{/vector_sim_top/vector_driver/data1_list[45]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[44]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[43]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[42]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[41]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[40]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[39]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[38]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[37]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[36]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[35]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[34]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[33]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[32]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[31]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[30]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[29]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[28]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[27]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[26]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[25]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[24]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[23]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[22]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[21]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[20]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[19]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[18]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[17]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[16]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[15]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[14]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[13]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[12]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[11]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[10]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[9]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[8]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[7]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[6]} {-height 15 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[5]} {-height 25 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[4]} {-height 25 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[3]} {-height 25 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[2]} {-height 25 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[1]} {-height 25 -radix unsigned} {/vector_sim_top/vector_driver/data1_list[0]} {-height 25 -radix unsigned}} /vector_sim_top/vector_driver/data1_list
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/data2_list
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/immediate_list
add wave -noupdate /vector_sim_top/vector_driver/reconfiguration_list
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/destination_list
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/operand_a_list
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/operand_b_list
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/operand_c_list
add wave -noupdate -radix unsigned -childformat {{/vector_sim_top/vector_driver/instr_o.valid -radix unsigned} {/vector_sim_top/vector_driver/instr_o.dst -radix unsigned} {/vector_sim_top/vector_driver/instr_o.src1 -radix unsigned} {/vector_sim_top/vector_driver/instr_o.src2 -radix unsigned} {/vector_sim_top/vector_driver/instr_o.data1 -radix unsigned} {/vector_sim_top/vector_driver/instr_o.data2 -radix unsigned} {/vector_sim_top/vector_driver/instr_o.reconfigure -radix unsigned} {/vector_sim_top/vector_driver/instr_o.immediate -radix unsigned} {/vector_sim_top/vector_driver/instr_o.fu -radix unsigned} {/vector_sim_top/vector_driver/instr_o.microop -radix unsigned} {/vector_sim_top/vector_driver/instr_o.use_mask -radix unsigned} {/vector_sim_top/vector_driver/instr_o.maxvl -radix unsigned} {/vector_sim_top/vector_driver/instr_o.vl -radix unsigned}} -subitemconfig {/vector_sim_top/vector_driver/instr_o.valid {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.dst {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.src1 {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.src2 {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.data1 {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.data2 {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.reconfigure {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.immediate {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.fu {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.microop {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.use_mask {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.maxvl {-height 25 -radix unsigned} /vector_sim_top/vector_driver/instr_o.vl {-height 25 -radix unsigned}} /vector_sim_top/vector_driver/instr_o
add wave -noupdate -radix unsigned /vector_sim_top/vector_driver/head
add wave -noupdate /vector_sim_top/vector_driver/valid_o
add wave -noupdate /vector_sim_top/vector_driver/pop_i
add wave -noupdate -divider vrrm
add wave -noupdate /vector_sim_top/vector_top/vrrm/valid_in
add wave -noupdate -radix unsigned -childformat {{/vector_sim_top/vector_top/vrrm/instr_in.valid -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.dst -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.src1 -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.src2 -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.data1 -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.data2 -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.reconfigure -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.immediate -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.fu -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.microop -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.use_mask -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.maxvl -radix unsigned} {/vector_sim_top/vector_top/vrrm/instr_in.vl -radix unsigned}} -radixenum symbolic -subitemconfig {/vector_sim_top/vector_top/vrrm/instr_in.valid {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.dst {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.src1 {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.src2 {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.data1 {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.data2 {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.reconfigure {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.immediate {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.fu {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.microop {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.use_mask {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.maxvl {-height 25 -radix unsigned -radixenum symbolic} /vector_sim_top/vector_top/vrrm/instr_in.vl {-height 25 -radix unsigned -radixenum symbolic}} /vector_sim_top/vector_top/vrrm/instr_in
add wave -noupdate /vector_sim_top/vector_top/vrrm/pop_instr
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vrrm/do_reconfigure
add wave -noupdate /vector_sim_top/vector_top/vrrm/do_remap
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vrrm/m_valid_o
add wave -noupdate /vector_sim_top/vector_top/vrrm/valid_o
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vrrm/instr_out
add wave -noupdate /vector_sim_top/vector_top/vrrm/ready_i
add wave -noupdate /vector_sim_top/vector_top/vrrm/m_ready_i
add wave -noupdate -divider vis
add wave -noupdate /vector_sim_top/vector_top/vis/valid_in
add wave -noupdate -radix unsigned -childformat {{/vector_sim_top/vector_top/vis/instr_in.valid -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.dst -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.dst_iszero -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.src1 -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.src1_iszero -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.src2 -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.src2_iszero -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.mask_src -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.data1 -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.data2 -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.reconfigure -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.ticket -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.immediate -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.fu -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.microop -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.use_mask -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.lock -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.maxvl -radix unsigned} {/vector_sim_top/vector_top/vis/instr_in.vl -radix unsigned}} -subitemconfig {/vector_sim_top/vector_top/vis/instr_in.valid {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.dst {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.dst_iszero {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.src1 {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.src1_iszero {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.src2 {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.src2_iszero {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.mask_src {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.data1 {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.data2 {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.reconfigure {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.ticket {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.immediate {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.fu {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.microop {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.use_mask {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.lock {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.maxvl {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/instr_in.vl {-height 25 -radix unsigned}} /vector_sim_top/vector_top/vis/instr_in
add wave -noupdate /vector_sim_top/vector_top/vis/ready_o
add wave -noupdate -divider <NULL>
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/current_exp_loop
add wave -noupdate /vector_sim_top/vector_top/vis/can_issue
add wave -noupdate /vector_sim_top/vector_top/vis/unlock_en
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/unlock_reg_a
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/unlock_reg_b
add wave -noupdate /vector_sim_top/vector_top/vis/pending
add wave -noupdate /vector_sim_top/vector_top/vis/locked
add wave -noupdate -radix unsigned -childformat {{{/vector_sim_top/vector_top/vis/locked_ticket[31]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[30]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[29]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[28]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[27]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[26]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[25]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[24]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[23]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[22]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[21]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[20]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[19]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[18]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[17]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[16]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[15]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[14]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[13]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[12]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[11]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[10]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[9]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[8]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[7]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[6]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[5]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[4]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[3]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[2]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[1]} -radix unsigned} {{/vector_sim_top/vector_top/vis/locked_ticket[0]} -radix unsigned}} -subitemconfig {{/vector_sim_top/vector_top/vis/locked_ticket[31]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[30]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[29]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[28]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[27]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[26]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[25]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[24]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[23]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[22]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[21]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[20]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[19]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[18]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[17]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[16]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[15]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[14]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[13]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[12]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[11]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[10]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[9]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[8]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[7]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[6]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[5]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[4]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[3]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[2]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[1]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/locked_ticket[0]} {-height 25 -radix unsigned}} /vector_sim_top/vector_top/vis/locked_ticket
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vis/mem_wr_en
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vis/mem_wr_addr
add wave -noupdate /vector_sim_top/vector_top/vis/mem_wr_addr_oh
add wave -noupdate /vector_sim_top/vector_top/vis/mem_wr_data
add wave -noupdate /vector_sim_top/vector_top/vis/wr_en
add wave -noupdate /vector_sim_top/vector_top/vis/wr_addr
add wave -noupdate /vector_sim_top/vector_top/vis/wr_data
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vis/valid_o
add wave -noupdate -radix unsigned -childformat {{{/vector_sim_top/vector_top/vis/data_to_exec[7]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[6]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[5]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[4]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[3]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[2]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[1]} -radix unsigned} {{/vector_sim_top/vector_top/vis/data_to_exec[0]} -radix unsigned}} -subitemconfig {{/vector_sim_top/vector_top/vis/data_to_exec[7]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[6]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[5]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[4]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[3]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[2]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[1]} {-height 25 -radix unsigned} {/vector_sim_top/vector_top/vis/data_to_exec[0]} {-height 25 -radix unsigned}} /vector_sim_top/vector_top/vis/data_to_exec
add wave -noupdate -radix unsigned -childformat {{/vector_sim_top/vector_top/vis/info_to_exec.dst -radix unsigned} {/vector_sim_top/vector_top/vis/info_to_exec.ticket -radix unsigned} {/vector_sim_top/vector_top/vis/info_to_exec.fu -radix unsigned} {/vector_sim_top/vector_top/vis/info_to_exec.microop -radix unsigned} {/vector_sim_top/vector_top/vis/info_to_exec.vl -radix unsigned} {/vector_sim_top/vector_top/vis/info_to_exec.head_uop -radix unsigned} {/vector_sim_top/vector_top/vis/info_to_exec.end_uop -radix unsigned}} -subitemconfig {/vector_sim_top/vector_top/vis/info_to_exec.dst {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/info_to_exec.ticket {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/info_to_exec.fu {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/info_to_exec.microop {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/info_to_exec.vl {-height 25 -radix unsigned} /vector_sim_top/vector_top/vis/info_to_exec.head_uop {-height 15 -radix unsigned} /vector_sim_top/vector_top/vis/info_to_exec.end_uop {-height 15 -radix unsigned}} /vector_sim_top/vector_top/vis/info_to_exec
add wave -noupdate /vector_sim_top/vector_top/vis/ready_i
add wave -noupdate -divider vex
add wave -noupdate /vector_sim_top/vector_top/vex/clk
add wave -noupdate /vector_sim_top/vector_top/vex/valid_i
add wave -noupdate -childformat {{/vector_sim_top/vector_top/vex/exec_info_i.dst -radix unsigned} {/vector_sim_top/vector_top/vex/exec_info_i.ticket -radix unsigned}} -subitemconfig {/vector_sim_top/vector_top/vex/exec_info_i.dst {-height 25 -radix unsigned} /vector_sim_top/vector_top/vex/exec_info_i.ticket {-height 25 -radix unsigned}} /vector_sim_top/vector_top/vex/exec_info_i
add wave -noupdate /vector_sim_top/vector_top/vex/exec_data_i
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vex/frw_a_en
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vex/frw_a_ticket
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vex/frw_a_addr
add wave -noupdate /vector_sim_top/vector_top/vex/frw_a_data
add wave -noupdate /vector_sim_top/vector_top/vex/frw_b_en
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vex/frw_b_ticket
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vex/frw_b_addr
add wave -noupdate /vector_sim_top/vector_top/vex/frw_b_data
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vex/wr_en
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vex/wr_addr
add wave -noupdate -radix unsigned -childformat {{{/vector_sim_top/vector_top/vex/wr_data[7]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[6]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[5]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[4]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[3]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[2]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[1]} -radix unsigned} {{/vector_sim_top/vector_top/vex/wr_data[0]} -radix unsigned}} -subitemconfig {{/vector_sim_top/vector_top/vex/wr_data[7]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[6]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[5]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[4]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[3]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[2]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[1]} {-height 15 -radix unsigned} {/vector_sim_top/vector_top/vex/wr_data[0]} {-height 15 -radix unsigned}} /vector_sim_top/vector_top/vex/wr_data
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vex/wr_ticket
add wave -noupdate -divider vmu
add wave -noupdate /vector_sim_top/vector_top/vmu/valid_in
add wave -noupdate -childformat {{/vector_sim_top/vector_top/vmu/instr_in.data1 -radix unsigned} {/vector_sim_top/vector_top/vmu/instr_in.data2 -radix unsigned} {/vector_sim_top/vector_top/vmu/instr_in.immediate -radix unsigned} {/vector_sim_top/vector_top/vmu/instr_in.vl -radix unsigned}} -subitemconfig {/vector_sim_top/vector_top/vmu/instr_in.data1 {-height 25 -radix unsigned} /vector_sim_top/vector_top/vmu/instr_in.data2 {-height 25 -radix unsigned} /vector_sim_top/vector_top/vmu/instr_in.immediate {-height 25 -radix unsigned} /vector_sim_top/vector_top/vmu/instr_in.vl {-height 25 -radix unsigned}} /vector_sim_top/vector_top/vmu/instr_in
add wave -noupdate /vector_sim_top/vector_top/vmu/ready_o
add wave -noupdate /vector_sim_top/vector_top/vmu/wrtbck_en_o
add wave -noupdate -radix unsigned /vector_sim_top/vector_top/vmu/wrtbck_data_o
add wave -noupdate -divider vMU_LD
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/valid_in
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/instr_in
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/grant_i
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/req_en_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/req_addr_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/req_size_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/req_microop_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/req_ticket_o
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/resp_valid_i
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/resp_ticket_i
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/resp_size_i
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_ld_eng/resp_data_i
add wave -noupdate -divider vMU_ST
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/valid_in
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/instr_in
add wave -noupdate -divider <NULL>
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/grant_i
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/req_en_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/req_addr_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/req_size_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/req_microop_o
add wave -noupdate /vector_sim_top/vector_top/vmu/vmu_st_eng/req_data_o
add wave -noupdate -divider <NULL>
add wave -noupdate -divider {Data Cache}
add wave -noupdate /vector_sim_top/data_cache/request_l2_valid
add wave -noupdate -radix unsigned /vector_sim_top/data_cache/request_l2_addr
add wave -noupdate /vector_sim_top/data_cache/update_l2_valid
add wave -noupdate -radix unsigned /vector_sim_top/data_cache/update_l2_addr
add wave -noupdate -radix hexadecimal /vector_sim_top/data_cache/update_l2_data
add wave -noupdate /vector_sim_top/data_cache/vector_resp_valid_o
add wave -noupdate /vector_sim_top/data_cache/serve
add wave -noupdate /vector_sim_top/data_cache/Hit_a
add wave -noupdate /vector_sim_top/data_cache/Hit_b
add wave -noupdate /vector_sim_top/data_cache/vct_request_a
add wave -noupdate /vector_sim_top/data_cache/vct_request_b
add wave -noupdate /vector_sim_top/data_cache/vct_head_requested
add wave -noupdate /vector_sim_top/data_cache/g_vector_buffer/multi_fetches_needed
add wave -noupdate -divider <NULL>
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {0 ns} 0}
quietly wave cursor active 0
configure wave -namecolwidth 236
configure wave -valuecolwidth 460
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 ns} {31017 ns}
